A line-sequential driving system is known as one of driving methods adopted in an active matrix liquid crystal display device. This is such system that driving signals are simultaneously written on source bus lines respectively connected to a plurality of pixels on a display panel during a period in which a single gate bus line is turned ON.
While, as a dot-sequential driving system, it is known that driving voltages corresponding to video signals are sequentially written on each block constituted of one or more source bus lines only at a predetermined period. Here, each of the divided blocks may include a single bus line, or may include a plurality of bus lines, e.g., three bus lines of RGB (Red, Green, Blue).
Here, in case of adopting the dot-sequential driving system, it is not necessary to simultaneously write driving signals, so that it is not necessary to provide a buffer circuit for temporarily holding signals unlike a line-sequential driving system. Thus, the dot-sequential driving system is adopted in a display panel manufactured with silicon such as LPS (Low-Temperature poly-Silicon) which is considered to make it difficult to manufacture a buffer circuit for example.
In the dot-sequential driving system, a time in which voltages can be written on pixels is shorter than in the line-sequential driving system. This is because the writing is possible only during a period shorter than a period obtained by dividing a selection period of a single horizontal line by the number of blocks as described above.
Further, a liquid crystal display device uses an inversion driving system such as a line inversion driving system in order to reduce flickers. In this case, voltages having different polarities are written on a single source bus line in respective horizontal periods, so that it takes time to write these voltages.
Thus, it is often that a precharge system for precharging source bus lines is adopted together with the dot-sequential driving system. For example, in a simultaneous precharge system performed as the foregoing precharge system, precharge voltages are simultaneously supplied to respective source bus lines during a horizontal line period in which all the gate bus lines are turned OFF. Thus, it is possible to write actual signal voltages even in a short time.
Here, a source driver of a conventional display device using the dot-sequential driving system is arranged so that a supply control circuit shown in FIG. 6 is provided on each source bus line. To the supply control circuit, a precharge control signal which reaches an ON-level only during a retrace line period and a sampling control signal which reaches an ON-level only during a period in which data to be written on pixels are written (sampling period) are inputted.
According to the arrangement of the supply control circuit shown in FIG. 6, a switch E25 turns ON during a period in which either the precharge control signal or the sampling control signal reaches an ON-level, so that a data signal is supplied to the source bus line. In this manner, the precharge control signal is caused to reach an ON-level during the precharge period, and a precharge voltage is supplied as the video signal. Further, in writing voltages on the pixels, the sampling control signal is caused to reach an ON-level, and the video signal is written.
Arrangements of a display device and a driving circuit each of which has the foregoing supply control circuit are respectively disclosed in Japanese Unexamined Patent Publication No. 105126/1998 (Tokukaihei 10-105126)(Publication date: Apr. 24, 1998) and Japanese Unexamined Patent Publication No. 175041/1999 (Tokukaihei 11-175041)(Publication date: Jul. 2, 1999).
Note that, Japanese Unexamined Patent Publication No. 206491/2000 (Tokukai 2000-206491)(Publication date: Jul. 28, 2000) discloses not the simultaneous precharging system but an arrangement in which two switches (a data signal switch and a precharge control signal switch) are provided on each bus line.
However, according to the conventional arrangement shown in FIG. 6, in precharging the bus lines, also peripheral circuits operate in the same manner as in the sampling. This raises such problem that power is unnecessarily consumed.
That is, in case of using the simultaneous precharge system in the dot-sequential driving, a writing time (time taken to carry out the writing operation) in the precharge and a writing time in the sampling are greatly different from each other. Thus, like the conventional arrangement, when the circuits operate as before though the writing time is different, a current excessively flows in the precharge operation, so that power is unnecessarily consumed.